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Technical Programme : Papers

Monday, April 6, 2009
	Paper Session 1 : Space and Scientific Applications
	On-Orbit Flight Results from the Reconfigurable Cibola Flight Experiment Satellite (CFESat) Michael Caffrey, Michael Wirthlin, William Howes, Daniel Richins, Keith Morgan, Diane Roussel-Dupr, Scott Robinson, Anthony Nelson and Anthony Salazar
	Accelerating Cosmological Data Analysis with FPGAs Volodymyr Kindratenko and Robert Brunner
	FPGA Design Analysis of the Clustering Algorithm for the CERN Large Hadron Collider Anthony Gregerson, Amin Farmahini-Farahani, Ben Buchli, Steve Naumov, Michail Bachtis, Katherine Compton, Michael Schulte, Wesley Smith and Sridhara Dasu
	Poster Session 1
	Paper Session 2 : High Speed Application Acceleration
	Accelerating Quadrature Methods for Option Valuation Anson H.T. Tse, David B. Thomas and Wayne Luk
	Accelerating SPICE Model-Evaluation using FPGAs Nachiket Kapre and Andre DeHon
	FPGA Accelerated Simulation of Biologically Plausible Spiking Neural Networks David B. Thomas and Wayne Luk
	Paper Session 3 : Reconfiguration
	Generic Software Framework for Adaptive Applications on FPGAs Suhaib A. Fahmy, J”rg Lotze, Juanjo Noguera, Robert Esser and Linda Doyle
	Block, Drop or Roll(back): Alternative Preemption Methods for RH Multi-Tasking Kyle Rupnow, Wenyin Fu and Katherine Compton
	Size-Reconfiguration Delay Trade-offs for a Class of DSP Blocks in Multi-mode Communication Systems Amir Hossein Gholamipour, Hamid Eslami, Ahmed Eltawil and Fadi Kurdahi
	Poster Session 2
	Paper Session 4 : Search Applications
	CAAD BLASTP: NCBI BLASTP Accelerated with FPGA-Based Pre-Filtering Jin Park, Yunfei Qiu and Martin Herbordt
	RCBLASTn: Implementation and Evaluation of the BLASTn Scan Function Siddhartha Datta, Parag Beeraka and Ron Sass
	Pipelined Multi-Core Architecture on FPGA for Large Dictionary String Matching Qingbo Wang and Viktor Prasanna
	Memory-Efficient Pipelined Architecture for Large-Scale String Matching Yi-Hua E. Yang and Viktor K. Prasanna
Tuesday, April 7, 2009
	Paper Session 5 : Reconfigurable Architectures
	A Massively Parallel FPGA-based Coprocessor for Support Vector Machines Srihari Cadambi, Igor Durdanovic, Venkata Jakkula, Murugan Sankaradass, Eric Cosatto, Srimat Chakradhar and Hans Peter Graf
	Application-Specific Customization and Scalability of Soft Multiprocessors Deepak Unnikrishnan, Jia Zhao and Russell Tessier
	Benchmarking Reconfigurable Architectures in the Mobile Domain >Peter Jamieson, Tobias Becker, Wayne Luk, Tero Rissa, Teemu Pitkanen and Peter Y.K. Cheung
	Poster Session 3
	Paper Session 6 : Image Processing
	Optical Flow on the Ambric Massively Parallel Processor Array (MPPA) Brad Hutchings, Brent Nelson, Stephen West, Reed Curtis
	Real-Time Fisheye Lens Distortion Correction Using Automatically Generated Streaming Accelerators Nikolaos Bellas, Sek Chai, Malcolm Dwyer and Dan Linzmeier
	FPGA-based Monte Carlo Computation of Light Absorption for Photodynamic Cancer Therapy ason Luu, Keith Redmond, William Chun Yip Lo, Paul Chow, Lothar Lilge and Jonathan Rose
	Paper Session 7 : Networking and Numerical Applications
	Scalable High Throughput and Power Efficient IP-Lookup on FPGA Hoang Le and Viktor Prasanna
	Architectural Comparison of Instruments for Transaction Level Monitoring of FPGA-based Packet Processing Systems Paul McKechnie, Michaela Blott and Wim Vanderbauwhede
	A Fine-grained Pipelined Implementation of the LINPACK Benchmark on FPGAs Guiming Wu, Yong Dou, Yuanwu Lei, Jie Zhou and Miao Wang
	Poster Session 4
	Paper Session 8 : Discrete Applications
	Compact and Flexible Microcoded Elliptic Curve Processor for Reconfigurable Devices Samuel Antao, Ricardo Chaves and Leonel Sousa
	Non-Preconditioned Conjugate Gradient on Cell and FPGA based Hybrid Supercomputer Nodes David DuBois, Andrew DuBois, Thomas Boorman and Carolyn Connor
	More Flops or More Precision? Accuracy Parameterizable Linear Equations Solvers for Model-Predictive Control Antonio Roldao-Lopes, Amir Shahzad, George Constantinides and Eric Kerrigan