FCCM 2022 Preliminary Program
*All times shown in Eastern Daylight Time (UTC-4)
Sunday – May 15 (Workshops & Tutorials)
Monday – May 16
★ indicates best paper candidate
| 9:00 am – 9:15 am | Opening |
| 9:15 am – 10:45 am |
Session 1 – Tools Chair: Andreas Koch, TU Darmstadt |
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Resource sharing in dataflow circuits ★ Lana Josipovic (ETH Zurich); Axel Marmet, Andrea Guerrieri and Paolo Ienne (EPFL) |
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Dynamic C-Slow Pipelining for HLS Jianyi Cheng, John Wickerson and George Constantinides (Imperial College London) |
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Zero Cost Address Mapping for HLS and Optane DCPMM Nicholas Beckwith, Jialiang Zhang and Jing Li (University of Pennsylvania) |
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IMpress: Large Integer Multiplication Expression Rewriting for FPGA HLS Ecenur Ustun, Ismail San (Cornell University), Jiaqi Yin, Cunxi Yu (The University of Utah), and Zhiru Zhang (Cornell University) |
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Resource Sharing for Verified High-Level Synthesis (short paper) Michalis Pardalos, Yann Herklotz and John Wickerson (Imperial College London) |
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| 10:45 am – 11:00 am |
Poster Day 1 intro (lightning round) Chair: Debjit Pal, Cornell University |
| 11:00 am – 11:50 am |
Break and Poster session 1 (in-person) Chair: Debjit Pal, Cornell University |
| 11:50 am – 12:50 pm | Keynote: Intel FPGAs for Programmable, Accelerated Infrastructure and Applications for the Modern Data Center |
| 12:50 pm – 2:20 pm | Break for lunch Poster session 2 (virtual) 1:50 pm – 2:20 pm Poster session chair: Debjit Pal, Cornell University |
| 2:20 pm – 3:45 pm |
Session 2 – Architecture Chair: Peipei Zhou, University of Pittsburgh |
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CoMeFa: Compute-in-Memory Blocks for FPGAs ★ (Best Paper Award) Aman Arora, Tanmay Anand, Aatman Borda, Rishabh Sehgal, Bagus Hanindhito, Jaydeep Kulkarni and Lizy John (The University of Texas at Austin) |
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Managing HBM Bandwidth on Multi-Die FPGAs with FPGA Overlay NoCs Srinirdheeshwar Kuttuva Prakash, Hiren Patel and Nachiket Kapre (University of Waterloo) |
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Evaluating the impact of using multiple-metal layers on the layout area of switch blocks for tile-based FPGAs in FinFET 7nm Sajjad Rostami Sani, Anas Razzaq and Andy Ye (Ryerson University) |
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An Evaluation of Using CCIX for Cache-Coherent Host-FPGA Interfacing Sajjad Tamimi, Florian Stock (TU Darmstadt); Arthur Bernhardt, Ilia Petrov (Reutlingen University) and Andreas Koch (TU Darmstadt) |
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| 3:45 pm – 3:55 pm | Break |
| 3:55 pm – 5:05 pm |
Session 3 – Applications 1 Chair: Mark Shand, Waymo LLC |
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FPGA Accelerator for Homomorphic Encrypted Sparse Convolutional Neural Network Inference Yang Yang, Sanmukh R. Kuppannagari, Rajgopal Kannan and Viktor Prasanna (University of Southern California) |
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An FPGA Accelerator for Genome Variant Calling Tiancheng Xu, Scott Rixner and Alan Cox (Rice University) |
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A Dual-Mode Similarity Search Accelerator based on Embedding Compression for Online Cross-Modal Image-Text Retrieval Yeo-Reum Park, Ji-Hoon Kim (KAIST), Jaeyoung Do (Amazon Alexa AI), and Joo-Young Kim (KAIST) |
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Software defined optical time-domain reflectometer (short paper) Thomas Mauldin, Zhenyu Xu and Tao Wei (University of Rhode Island) |
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| 5:05 pm – 6:00 pm | Break |
| 6:00 pm – 8:30 pm |
Reception (from 6 pm) Demo night (6:30 pm to 8:30 pm） |
Tuesday – May 17
| 9:00 am – 10:25 am |
Session 4 – Machine Learning Chair: Mohamed Abdelfattah, Cornell Tech |
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FAXID: FPGA-Accelerated XGBoost Inference for Data Centers using HLS Archit Gajjar, Priyank Kashyap, Aydin Aysu, Paul Franzon (NC State University), Sumon Dey and Chris Cheng (Hewlett Packard Enterprise) |
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Reverse Engineering Neural Network Folding with Remote FPGA Power Analysis Vincent Meyers, Dennis Gnad and Mehdi Tahoori (Karlsruhe Institute of Technology) |
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NNReArch: A Tensor Program Scheduling Framework Against Neural Network Architecture Reverse Engineering Yukui Luo, Shijin Duan, Cheng Gongye, Yunsi Fei and Xiaolin Xu (Northeastern University) |
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High-Rate Machine Learning for Forecasting Time-Series Signals Atiyehsadat Panahi, Ehsan Kabir (University of Arkansas), Austin Downey (University of South Carolina), David Andrews, Miaoqing Huang (University of Arkansas) and Jason Bakos (University of South Carolina) |
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| 10:25 am – 10:40 am |
Poster Day 2 intro (lightning round) Chair: Debjit Pal, Cornell University |
| 10:40 am – 11:30 am |
Break and Poster session 3 (virtual) Chair: Debjit Pal, Cornell University |
| 11:30 am – 12:40 pm |
Session 5 – Security and Crypto Chair: Ron Sass, UNCC |
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A High-Performance Hardware Architecture for ECC Point Multiplication over Curve25519 ★ Guiming Wu, Qianwen He, Jiali Jiang, Zhenxiang Zhang, Xin Long (Alibaba Group); Yuan Zhao (Ant Group) and Yinchao Zou (Ant Group) |
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A Cautionary Note on Protecting Xilinx’ UltraScale(+) Bitstream Encryption and Authentication Engine Maik Ender (Max Planck Institute for Security and Privacy (MPI-SP)), Gregor Leander (Ruhr University Bochum), Amir Moradi (University of Cologne) and Christof Paar (Max Planck Institute for Security and Privacy (MPI-SP)) |
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Characterization of Side Channels on FPGA-based Off-The-Shelf Boards against Automated Attacks Jens Trautmann, Jürgen Teich and Stefan Wildermann (University of Erlangen-Nuremberg) |
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Precise Fault Injection to Enable DFIA for Attacking AES in Remote FPGAs (short paper) Xiang Li, Russell Tessier and Daniel Holcomb (University of Massachusetts Amherst) |
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| 12:40 pm – 2:10 pm | Break for lunch and Poster session 4 (virtual) 1:40 pm – 2:10 pm Chair: Debjit Pal, Cornell University |
| 2:10 pm – 3:20 pm |
Session 6 – Applications 2 Chair: John Wickerson, Imperial College London |
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Fast Arbitrary Precision Floating Point on FPGA Johannes de Fine Licht (ETH Zurich), Christopher A. Pattison (Caltech), Alexandros N. Ziogas (ETH Zurich), David Simmons-Duffin (Caltech) and Torsten Hoefler (ETH Zurich) |
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Low-Latency Modular Exponentiation for FPGAs Martin Langhammer, Sergey Gribok and Bogdan Pasca (Intel Corporation) |
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A Generator of Numerically-Tailored and High-Throughput Accelerators for Batched GEMMs Louis Ledoux and Marc Casas (Barcelona Supercomputing Center) |
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Leveraging FPGA Runtime Reconfigurability to Implement Multi-Hash-Chain Proof-of-Work (short paper) Tong Wu and Oliver Diessel (The University of New South Wales) |
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| 3:20 pm – 4:10 pm |
Break and Poster session 5 (in person) Chair: Debjit Pal, Cornell University |
| 4:10 pm – 4:25 pm | Award and Closing |