Systolic-CNN: An OpenCL-defined Scalable Run-time-flexible FPGA Accelerator Arch

FCCM Main Page › Forums › Poster Session 5 – Machine Learning 1 › Systolic-CNN: An OpenCL-defined Scalable Run-time-flexible FPGA Accelerator Arch

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    • April 8, 2020 at 6:29 am #1203
      Ken Eguro
      Keymaster

      Systolic-CNN: An OpenCL-defined Scalable Run-time-flexible FPGA Accelerator Architecture for Accelerating Convolutional Neural Network Inference in Cloud/Edge Computing – Link for PDF
      Akshay Dua (Arizona State University), Yixing Li (Arizona State University), and Fengbo Ren (Arizona State University)


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