Exploring Writeback Designs for Efficiently Leveraging Parallel-Execution Units FCCM Main Page › Forums › Paper Session 4 – Virtualization, HBM, and Soft Processors › Exploring Writeback Designs for Efficiently Leveraging Parallel-Execution Units This topic has 0 replies, 1 voice, and was last updated 1 month, 3 weeks ago by Ken Eguro. Log In Register Lost Password Viewing 0 reply threads Author Posts April 8, 2020 at 5:57 am #1164 Ken EguroKeymaster Exploring Writeback Designs for Efficiently Leveraging Parallel-Execution Units in FPGA-Based Soft-Processors – Link for PDF Eric Matthews (Simon Fraser University), Yuhui Gao (Simon Fraser University), and Lesley Shannon (Simon Fraser University) /proceedings/2020/Presentations/PaperSession4/3.webm Author Posts Log In Register Lost Password Viewing 0 reply threads You must be logged in to reply to this topic. Log In Username: Password: Keep me signed in Log In