The IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM) is the original and premier forum for presenting and discussing new research related to computing that exploits the unique features and capabilities of FPGAs and other reconfigurable hardware.
The FCCM 2019 Demo Night is a show-and-tell event, held on Monday, April 29th. All conference attendees are invited to the demo night to mingle and share knowledge in an informal setting. Demonstrations may include system designs, platforms, tools, and more. The Demo Night is a great opportunity for representatives of the most prominent industries in the field to meet with the leading FCCM researchers, which might include prospective customers or potential future employees. This event is also an excellent occasion for academic researchers to increase their visibility, demonstrate their latest work, show how to use open source software or building blocks, and receive early feedback on their work in progress.
Demo Night Program
6:00 – 8:30 PM PDT
Scripps Forum
| Demo # | Authors | Title | Video Link (Optional) |
|---|---|---|---|
| 1 | Dan Pritsker and Colman Cheung | Monobit Wideband Receiver with Integrated Dithering in FPGA | |
| 2 | Martin Geier, Dominik Faller, Marian Brändle and Samarjit Chakraborty | Combined Energy and Latency Monitoring of a Zynq-based GigE Vision Acquisition/Processing Pipeline | Link |
| 3 | Michail Papadimitriou, Juan Fumero, Athanasios Stratikopoulos and Christos Kotselidis | Enabling Fast Prototyping and Acceleration of Java Programs onto Intel FPGAs with TornadoVM | |
| 4 | Georgi Gaydadjiev and Nils Voss | Performance Potability using MaxCompiler | |
| 5 | Jonathan Beaumont, Shane Fleming, Matthew Naylor, David Thomas, Andrew Brown, Andrey Mokhov and Simon Moore | POETS - Partial Ordered Event Triggered Systems | |
| 6 | Haggai Eran, Lior Zeno, Maroun Tork, Gabi Malka, Zsolt István and Mark Silberstein | A SmartNIC-based memcached Accelerator with NICA and ntl | |
| 7 | Daniel Holanda Noronha, Ruizhe Zhao, Jeffrey Goeders, Wayne Luk and Steve Wilton | On-chip FPGA Debug Instrumentation for Machine Learning Applications | Link |
| 8 | Eddie Hung and David Shah | Yosys+nextpnr: Bet you can't say this tongue twister faster than I can bitstream | |
| 9 | Naif Tarafdar, Varun Sharma and Paul Chow | Telepathy: A Multi-FPGA, Multi-CPU Machine Learning Framework Deployed on a Hardware Stack | |
| 10 | Dallon Glick, Jesse Grigg, Brent Nelson and Michael Wirthlin | Maverick: A Stand-alone CAD Flow for Partially Reconfigurable FPGA Modules | |
| 11 | Richard Chamberlain and Marcus Weddle | FPGA Acceleration of Binary Weighted Neural Network Inference | Link |
| 12 | Dominique Meyer, Akhil Birlangi, Ryan Kastner and Falko Kuester | FPGA Accelerated Stereo Depth for Stereo-Panoramic Video and Scene Estimation | |
| 13 | Sergiu Mosanu, Xinfei Guo, Mohamed El-Hadedy, Lorena Anghel and Mircea Stan | Flexible, Highly-Parameterizable Encryption Modules in Chisel on RISC-V Cores | |
| 14 | Mineto Tsukada, Masaaki Kondo and Hiroki Matsutani | An FPGA-based On-device Sequential Learning Approach for Unsupervised Anomaly Detection | |
| 15 | Guy Lemieux | Running highly accelerated software on FPGA-based soft and hard processors | Link |
| 16 | Eugenio Culurciello, Sen Ma and Shanyuan Gao | Creating an AI-Generated Portrait via Style Transfer | |
| 17 | Alireza Khodamoradi, Ryan Kastner and Parimal Patel | Designing and Fast Prototyping with PYNQ and Vivado HLS | |
| 18 | John Lockwood | Real-time data in connected cities using Key Value Store in FPGA |