Reliability, power consumption and timing performance are key considerations for the utilisation of Field Programmable Gate Arrays. Online measurement techniques can determine the timing characteristics of an FPGA application while it is operating and facilitate a range of benefits. Degradation can be monitored by tracking progressive changes in timing performance, while power consumption can be reduced through dynamic voltage scaling (DVS) of the power supply to exploit any spare timing headroom. Alternatively, if higher performance is the objective, dynamic frequency scaling (DFS) can be used to maximise operating frequency. In all cases, online timing measurement of the application circuit is used to overcome the conservative safety margins that are built into timing models.
This work demonstrates a method of online measurement, achieved by sweeping the phase of a secondary clock signal, driving additional shadowing registers strategically added to the application design. The measurement technique and initial voltage and frequency scaling experiments are demonstrated on an Altera Cyclone III FPGA. Timing performance can be measured with a best case resolution of 96ps. The additional circuitry results in minimal overhead in terms of area and performance. Power savings of 29% in an example circuit are achieved through DVS, or performance improvements of 22% through DFS, when compared with operating at nominal voltage, or timing model FMax.