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FCCM 1999

The 7th IEEE International Symposium on
Field-Programmable Custom Computing Machines

April 20-23, 1999

Technical Programme : Papers

Wednesday, April 21, 1999
Paper Session 1 : Tools
Macro-Based Hardware Compilation of Java(tm) Bytecodes into a Dynamic Reconfigurable Computing System
Joao M. P. Cardoso and Horacio C. Neto
A CAD Suite for High-Performance FPGA Design
Brad Hutchings, et. al.
Formal Verification of Reconfigurable Cores
Satnam Singh and Carl Johan Block
Poster Session 1
Paper Session 2 : Network Applications
Transmutable Telecom System and Its Application
T. Miyazaki, T. Murooka, M. Katayama, A. Takahara
Implementation and Evaluation of a Prototype Reconfigurable Router
Jason Hess, David Lee, Scott Harper, Mark Jones and Peter Athanas
Paper Session 3 : Compilation
Pipeline Vectorization for Reconfigurable Systems
Markus Weinhardt and Wayne Luk
Automatic Allocation of Arrays to Memories in FPGA Processors With Multiple Memory Banks
Maya Gokhale and Jan Stone
Parallelizing Applications into Silicon
Jonathan Babb et. al.
Poster Session 2
Paper Session 4 : Architectures
Reconfigurable Elements for a Video Pipeline Processor
Michael Piacentino, Gooitzen van der Wal and Michael Hansen
ConCISe: A Compiler-Driven CPLD-Based Instruction Set Accelerator
Bernardo Kastrup, Arjan Bink and Jan Hoogerbrugge
Thursday, April 22, 1999
Paper Session 5 : Tools
CPR: A Configuration Profiling Tool
Srihari Cadambi and Seth Copen Goldstein
Debugging Techniques for Dynamically Reconfigurable Hardware
Nicholas McKay and Satnam Singh
Improving Simulation Accuracy in Design Methodologies for Dynamically Reconfigurable Logic Systems
Milan Vasilko and David Cabanis
Poster Session 3
Paper Session 6 : Graphics Applications
Reconfigurable Computing for Augmented Reality
W. Luk, T.K. Lee, J.R. Rice, N. Shirazi and P.Y.K. Cheung
Sepia: scalable 3D compositing using PCI Pamette
Laurent Moll, Alan Heirich and Mark Shand
Invited Talk
Molecular Manufacturing: Beyond Moore's Law
Philip Kuekes
Paper Session 7 : Applications
An Edge-Endpoint-Based Configurable Hardware Architecture for VLSI CAD Layout Design Rule Checking
Zhen Luo, Margaret Martonosi, Pranav Ashar
Fafner--Accelerating Nesting Problems with FPGAs
J. Carlos Alves et. al.
Poster Session 4
Paper Session 8 : DSP Applications
Field Programmable Gate Array Based Radar Front-End Digital Signal Processing
Tyler Moeller and David R. Martinez
Optimizing FPGA-based vector product designs
Daniel Benyamin, Wayne Luk and John Villasenor
Friday, April 23, 1999
Paper Session 9 : Run Time Systems
PCI-PipeRench and the SwordAPI: A System for Stream-based Reconfigurable Computing
Ronald Laufer, R. Reed Taylor and Herman Schmit
Safe and Protected Execution for the Morph/AMRM Reconfigurable Processor
Andrew A. Chien and Jay H. Byun
Implementing an API for Distributed Adaptive Computing Systems
Mark Jones et. al.
Poster Session 5
Paper Session 10 : Arithmetic
A Super-Serial Galois Fields Multiplier for FPGAs and its Application to Public-Key Algorithms
Gerardo Orlando and Christof Paar
Automatic Floating to Fixed Point Translation and its Application to Post--Rendering 3D Warping
M. P. Leong et. al.
Dynamic Precision Management for Loop Computations on Reconfigurable Architectures
Kiran Bondalapati and Viktor K. Prasanna